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Intel Jacobsville Platform |
 jacobsville (Snow Ridge / Parker Ridge)
The Snow Ridge System-on-a-Chip (SoC) product family is Intel¡¯s next generation of
communication processors designed in Intel¡¯s 10 nm process technology. The three
major subsystems in this highly-integrated SoC are the Central Processing Unit (CPU)
Complex, the Platform Control Hub (PCH), and the Network Accelerator Complex
(NAC). The CPU Complex contains up to 24 next-generation 64-bit Intel Atom¢ç
processor cores (code name Tremont). The PCH is architected with a rich set of
interconnect technologies. The NAC includes technologies for security and packet
processing. The SoC architecture is highly scalable and efficient, providing a unified
solution across an array of products.
SoC Key Features
• Up to 24 Intel Atom¢ç processor cores (code name Tremont) at up to 2.2 GHz
• Mid-Level Cache (MLC) and Last Level Cache (LLC), including memory and cache
Quality of Service (QoS):
— 4.5 MB of MLC per four-core cluster, for a total of 27 MB for 6 clusters
— 2.5 MB of LLC per tile, for a total of 15 MB for 6 tiles
• Integrated Memory Controller (IMC) that provides up to two 72-bit DDR4
interfaces (64-bit data + 8-bit Error Correcting Code (ECC)) and operating up to
2933 MT/s
• Highly scalable, server-class, coherent internal fabric with best-in-class latency
and QoS
• Intel¢ç Dynamic Load Balancer (Intel¢ç DLB) 1.0 for fine-grained, programmable
workload scheduling and load balancing
• Network Accelerator Complex (NAC) with high performance, programmable,
packet-processing acceleration technology, including:
— Network Interface and Scheduler (NIS, code name Columbia Park), with nine
levels of hierarchical scheduling
— Flexible Packet Processor and Switch (FPPS, code name Highland Park (SKU
dependent)), leveraging high-performance cut-through architecture
— Intel¢ç QuickAssist Technology (Intel¢ç QAT) v1.8 (SKU dependent), which
performs security and compression acceleration
• Intel¢ç QAT) v1.7 (SKU dependent), which performs security and compression
acceleration
• Up to 8 high-speed Ethernet interfaces, with support for 100 GbE, 50 GbE,
25 GbE, 10 GbE, 2.5 GbE, and 1 GbE, with in-line MACsec (SKU dependent) at line
rate up to 50 GbE
• Additional I/O interface support that includes USB 3.2 Gen 1x1, USB 2.0, PCI
Express* (PCIe*) Gen3, and SATA Gen2or Gen3 (depending on the DTR soft strap)
• Fully Integrated Voltage Regulator (FIVR) modules that reduce design complexity
and BOM costs
• Full hardware virtualization:
— Intel¢ç Virtualization Technology for IA-32, Intel¢ç 64, and Intel¢ç Architecture
(Intel¢ç VT-x)
— Intel¢ç Virtualization Technology for Directed I/O (Intel¢ç VT-d)
— Virtual Machine Device Queues (VMDq)
— Single Root I/O Virtualization (SR-IOV)
• Server-class Reliability, Availability, and Serviceability (RAS)
• Intel¢ç Resource Director Technology (Intel¢ç RDT) |
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