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BIOS & EC Deleveopment Specialized No.1 Company

  Intel Oak Trail Platform


ÀÎÅÚ¢ç ¾ÆÅè¢â ÇÁ·Î¼¼¼­ Z6xx ½Ã¸®Áî(ÀÎÅÚ¢ç SM35 ÀͽºÇÁ·¹½º Ĩ¼Â Æ÷ÇÔ)
Oak Trail (Lincroft + Whitney Point)



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ÀÎÅÚ¢ç ¾ÆÅè¢â Z670 ¹× Z650 ÇÁ·Î¼¼¼­´Â 45nm °øÁ¤ ±â¼ú¿¡ ±â¹ÝÇÑ °í±Þ Àü¿ø °ü¸® ±â¼úÀ» ±¸ÇöÇÏ¿© Ź¿ùÇÑ ¿ÍÆ®´ç ¼º´É ¼öÁØÀ» Á¦°øÇÕ´Ï´Ù. ÀÎÅÚ¢ç SM35 ÀͽºÇÁ·¹½º Ĩ¼Â°ú ÇÔ²² »ç¿ëÇÒ °æ¿ì ÀÌ Ç÷§ÆûÀÇ ÀúÀü·Â, ¹èÅ͸® Áö¿ø ±â´É ¹× ÀÓº£µðµå ÅÂºí¸´ µðÀÚÀÎÀÌ ÇÑÃþ ÃÖÀûÈ­µË´Ï´Ù.

•ÀÎÅÚ¢ç ¾ÆÅè¢â ÇÁ·Î¼¼¼­ Z6xx ½Ã¸®Áî´Â ¿¡³ÊÁö È¿À²ÀÌ ¶Ù¾î³­ ´ÜÀÏ ÀÎÅÚ¢ç ¾ÆÅè¢â ÇÁ·Î¼¼¼­ ÄÚ¾î¿Í 3D ±×·¡ÇÈ, ºñµð¿À µðÄÚµù °¡¼Ó ±â´É, ¸Þ¸ð¸® ¹× LVDS µð½ºÇ÷¹ÀÌ ÄÁÆ®·Ñ·¯¸¦ ÇϳªÀÇ ÆÐŰÁö·Î °áÇÕÇÕ´Ï´Ù.
•ÀÎÅÚ¢ç ÅëÇÕ ±×·¡ÇÈ ¹Ìµð¾î °¡¼Ó±â(GMA) 600 ±×·¡ÇÈ ¿£Áø: 400MHz ±×·¡ÇÈ ÄÚ¾î Á֯ļö¿¡¼­ ÀÛµ¿Çϸç, Àü·Â ÃÖÀûÈ­µÈ 2D/3D ±×·¡ÇÈ ¿£ÁøÀº Microsoft Windows* DX9, Linux* OpenGL 2.1 ¹× Çϵå¿þ¾î °¡¼Ó HD ºñµð¿À µðÄÚµùÀ» Áö¿øÇÕ´Ï´Ù.
•ÅëÇÕÇü ¸Þ¸ð¸® ÄÁÆ®·Ñ·¯ ¹× DDR2 Áö¿ø: ÅëÇÕÇü 32ºñÆ® ´ÜÀÏ Ã¤³Î ¸Þ¸ð¸® ÄÁÆ®·Ñ·¯´Â È¿À²ÀûÀÎ »çÀü ¹ÝÀÔ ¾Ë°í¸®Áò, ³·Àº Áö¿¬ ¹× ³ôÀº ¸Þ¸ð¸® ´ë¿ªÆøÀ» ÅëÇØ ºü¸¥ ¸Þ¸ð¸® Àбâ/¾²±â ¼º´ÉÀ» Á¦°øÇÕ´Ï´Ù. ÀÌ ÇÁ·Î¼¼¼­ ½Ã¸®Áî´Â ÃÖ´ë 2GB ¿ë·®ÀÇ DDR2 800MT/s ¸Þ¸ð¸® ±â¼úÀ» Áö¿øÇÕ´Ï´Ù.
•¿ì¼öÇÑ ÀÎÅÚ¢ç SM35 ÀͽºÇ÷¹½º Ĩ¼ÂÀ» äÅÃÇϰí ÀÖÀ¸¸ç, ÀÌ Ä¨¼ÂÀÌ ³»ÀåµÈ 14x14mm 493-º¼ FCBGA ÆÐŰÁö¿¡´Â HDMI v1.3a ¹× HDCP 1.3 ȣȯ µð½ºÇ÷¹ÀÌ Ãâ·Â ±â´É°ú WiFi, WWAN ¹× LAN ¼Ö·ç¼Ç ¹× SSD ȣȯ SATA Gen 2¸¦ Áö¿øÇÏ´Â USB ¹× SDIO Æ÷Æ®°¡ Æ÷ÇԵǾî ÀÖ½À´Ï´Ù.
•ÀÌ Ç÷§ÆûÀº Windows*7, Windows Embedded Standard* 7, MeeGo* 1.2 ¹× Android* 3.x(Honeycomb*)¸¦ ºñ·ÔÇÑ ´Ù¾çÇÑ ¿î¿µ üÁ¦¸¦ Áö¿øÇÕ´Ï´Ù.


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ÀÎÅÚ¢ç ¾ÆÅè¢â ÇÁ·Î¼¼¼­ Z650512 KB, 1.2 GHz3.0W2 GB, DDR2 800HT
ÀÎÅÚ¢ç ¾ÆÅè¢â ÇÁ·Î¼¼¼­ Z670512 KB, 1.5 GHz3.0W2 GB, DDR2 800HT


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ÀÎÅÚ¢ç SM35 ÀͽºÇÁ·¹½º Ĩ¼Â493-ball FCBGA 14x14mm0.75WHDMI v1.3a ¹× HDCP 1.3, USB 2.0 4°³, SDIO 3°³, SPI 2°³, ÀÎÅÚ HDA, SATA 1°³, LPC


¢Ñ Atom Processor Z6xx Series Features
• Supports Intel¢ç Hyper-Threading Technology
• 2-wide instruction decode and in-order execution
• 512 KB, 8 way L2 cache
• Support for IA 32-bit architecture
• FCMB3 packaging technology
• Thermal management support using TM1 and TM2
• On die Digital Thermal Sensor (DTS) for thermal management support using Intel¢ç Thermal Monitor 1 (TM1) and Intel¢ç Thermal Monitor 2 (TM2)
• Advanced power management features including Enhanced Intel¢ç SpeedStep¢ç Technology
• Supports C0/C1(e)/C2(e)/C4(e) power states
• Intel Deep Power Down Technology (C6)

¡á  System Memory Support
• One channel of DDR2 memory
• 32-bit data bus
• Memory DDR2 transfer rates of 800 MT/s
• Supports 1 Gb, and 2 Gb devices
• Supports total memory size of 1 GB, and 2 GB
• Provides aggressive power management to reduce power consumption when idle
• Provides proactive page closing policies to close unused pages

¡á  Display Controller
• Seven display planes: Display Plane A, Display Plane B, Display C/sprite, Overlay, Cursor A, Cursor B, and VGA
• Display Pipe A: Supports LVDS display interface
• Display Pipe B: Supports HDMI via chipset
• Maximum resolution (LVDS display):
⎯ 1366 x 768 @ 18 bpp and 60 fps
• Supports 18 bpp
• Supports Non-Power of 2 Tiling
• Output pixel width: 24-bit RGB
• Supports NV12 video data format
• Supports 3 x 3 panel fitter
• Dynamic Power Saving Technology (DPST) 3.0
• Support 16 x 256 byte tile size
• Supports overlay
• Supports global constant alpha blending

¡á  cDMI
• Peak raw BW of cDMI link per direction = 400 MT/s using a quad-pumped 8-bit transmit and an 8-bit receive data bus
• Supports low power management schemes
• Supports CMOS interface

¡á  cDVO
• Peak raw BW of 800MT/s
• Supports low power management schemes
• Supports AGTL+ interface

¡á  LVDS
• Maximum resolution (internal display) of:
• 1366 x 768 @ 18 bpp and 60 fps
• Dot clock range from 20–83 MHz
• Four differential signal pairs: Three data pairs (up to 581 Mbps on each data link) and one clock pair
• Supports 18 bpp packed and 18 bpp loosely packed pixel formats
• Supports 24 bpp with a limited number of validated panels.


¢Ñ Platform Controller Hub(PCH) SM35 Features
• CMOS Direct Media Interface (cDMI)—Primary link between Processor and PCH
• CMOS Digital Video Out (cDVO)—Display Interface between Processor and PCH for driving external displays.
• Universal Serial Bus (USB) High Speed (HS)—In the box USB HS device interface
• One SD/SDIO/MMC interface
• One dedicated SDIO communication interface.
• Intel¢ç HD Audio 1.0 Interface with two SDIs
• One HDMI 1.3a interface for external display
• Single ported AHCI 1.3 compliant SATA host controller with support for up to 3.0 Gbs (Gen2) transfer rate
• Three I2C interfaces to allow monitoring in-box environmental sensors and to control in-box components
• Two SPI master interfaces to interface with simple external devices (e.g., the touch screen controller or GPS device)
• Protocol/voltage level converters for external displays
• The system clock generator providing clocks for all components in the system except for the real-time clock.
• System Controller Unit (SCU)—Provides platform power management by use of PMIC and management system standby states
• Intel Legacy Block t(iLB) hat includes the following blocks
— LPC
— 8254
— 8259
— RTC
— IOAPIC
• Support for ACPI 1.3 configuration and power managementSRAM—A 256-KB block of SRAM used for system boot code and other functions when system DRAM (connected to Processor) is unavailable.
— This allows the processor to extend standby time and enhances battery life.
• DFx—Design for Test/Debug
— Boundary Scan
— JTAG access to System Controller Unit (SCU) to support power management and boot debug

¢Ñ  Platform Brief: Intel¢ç Atom¢â Processor Z6xx Series with Intel¢ç SM35 Express Chipset



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